COMP201P - Computer Architecture and Concurrency

This database contains the 2017-18 versions of syllabuses.

Note: Whilst every effort is made to keep the syllabus and assessment records correct, the precise details must be checked with the lecturer(s).

Code COMP201P
Year 2
Prerequisites Strong Java programming skills
Taught By Kevin Bryson (100%)
Aims To provide a working knowledge of the hardware and architecture of a computer system, particularly focusing on aspects such as memory hierarchy, cache coherence and multi-threaded hardware support that impact a full understanding of how to write multi-threaded software. This is a practical course, grounded in a theoretical understanding of concurrency and the problems and benefits it brings. We will use multi-threaded Java and provide an understanding of how to apply appropriate concurrency control primitives where there is simultaneous access to shared resources.
Learning Outcomes To be able to: describe how basic logical and arithmetic operations are implemented and performed using simple electronic components. Understand how a computer is constructed from these basic electronic components and how these operate together to execute machine code programs. Write simple MIPS assembly language programs. Understand how high-level languages are translated to assembly and then machine code instructions executed by the CPU using a real MIPS32 processor as a case study. Develop an appreciation for how memory and I/O is handled and managed by the computer including key concurrency aspects such as cache coherence and visibility. In terms of concurrency, to be able to: describe the problems of interleaving, apply a range of standard concurrency control primitives to simple concurrency problems, design and implement concurrent Java programs and reason informally about their correctness.


Top-down high level overview of a computer

The main components of: microcontrollers; embedded computers; portable PCs and desktops.

Fundamentals of hardware

Basic overview of the physics of electric circuits and semiconductors; Transistors and logic gates.

Data representation

binary; octal; hexadecimal; fixed-size arithmetic; 2s-complement; big-endian; little-endian; fixed point; floating point; character strings.

Boolean algebra

the abstract language that allows us to represent and construct more complex electronic components from simple logic gates

Constructing larger electronic components from logic gates

adders; subtractors; logic units; ALUs; registers; CPU data pipelines; memory; I/O interfaces


how the CPU executes machine code instructions of a program. (Going from high-level constructs, to assembly language, to machine code that gets executed.)


We investigate a real architecture, the structure of its instructions, and how to program at machine level.


Various methods through which CPU communicates with the external world.

Memory and Disk

Understanding basic concepts about primary and secondary storage, and learning their performance measures.

Memory Management

How CPU actually uses memory during computer operation.

Concurrent programs

  • Architecture of concurrent systems
  • Using and managing threads in Java.

Synchronisation primitives

  • Traditional mechanisms including synchronized methods and statements. Semaphores.
  • Monitor design pattern and conditional variables.
  • Java 5 concurrency package mechanisms.

Simple reasoning about correctness of Concurrent Programs

  • Safety.
  • Variable visibility.
  • Liveness and Progress.
  • Starvation and Deadlocks.

Method of Instruction

Lecture presentations, interactive coursework and discussion board interaction.


The course has the following assessment components:

  • Written Examination (2 hours, 70%);
  • Coursework Section (2 pieces, 30%).

To pass this course, students must:

  • Obtain an overall pass mark of 40% for all components combined;
  • Obtain a minimum mark of 30% in each component worth ≥ 30% of the module as a whole.


Reading list available via the UCL Library catalogue.